TSB41AB2PAP

Product Summary

The TSB41AB2PAP provides the digital and analog transceiver functions needed to implement a two-port node in a cable-based IEEE 1394 network. The cable ports incorporate two differential line transceivers. The transceivers include circuitry to monitor the line conditions as needed for determining connection status, for initialization and arbitration, and for packet reception and transmission. The TSB41AB2PAP requires only an external 24.576-MHz crystal as a reference. An external clock may be provided instead of a crystal. An internal oscillator drives an internal phase-locked loop (PLL), which generates the required 393.216-MHz reference signal. The TSB41AB2PAP supports an optional isolation barrier between itself and its LLC. When the ISO input terminal is tied high, the LLC interface outputs behave normally.

Parametrics

TSB41AB2PAP absolute maxing ratings: (1)Supply voltage range, VDD: -0.3V to 4V; (2)Input voltage range, VI: -0.5V to VDD+0.5V; (3)Output voltage range at any output, VO: -0.5 V to VDD+0.5V; (4)Operating free air temperature, TA: 0℃ to 70℃; (5)Storage temperature range, Tstg: -65℃ to 150℃; (6)Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: 260℃.

Features

TSB41AB2PAP features: (1)Fully Supports Provisions of IEEE 1394-1995 Standard for High Performance Serial Bus and IEEE 1394a-2000; (2)Fully Interoperable With FireWire. and i.LINK. Implementation of IEEE Std 1394; (3)Fully Compliant With OpenHCI Requirements; (4)Provides Two IEEE 1394a-2000 Fully Compliant Cable Ports at 100/200/400 Megabits Per Second (Mbits/s); (5)Full IEEE 1394a-2000 Support Includes: Connection Debounce, Arbitrated Short Reset, Multispeed Concatenation, Arbitration Acceleration, Fly-By Concatenation, Port Disable/Suspend/Resume; (6)Register Bits Give Software Control of Contender Bit, Power Class Bits, Link Active Control Bit and IEEE 1394a-2000 Features; (7)IEEE 1394a-2000 Compliant Common Mode Noise Filter on Incoming TPBIAS; (8)Extended Resume Signaling for Compatibility With Legacy DV Devices, and Terminal- and Register-Compatibility With TSB41LV02A, Allow Direct Isochronous Transmit to Legacy DV Devices With Any Link Layer Even When Root; (9)Power-Down Features to Conserve Energy in Battery Powered Applications Include: Automatic Device Power Down During Suspend, Device Power-Down Terminal, Link Interface Disable via LPS, and Inactive Ports Powered Down.

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