Product Summary
The XC3S400-4FG456C is Field-Programmable Gate. It is specifically designed to meet the needs of high volume, cost-sensitive consumer electronic applications. The device offers densities ranging from 50,000 to five million system gates. The XC3S400-4FG456C builds on the success of the earlier Spartan-IIE family by increasing the amount of logic resources, the capacity of internal RAM, the total number of I/Os, and the overall level of performance as well as by improving clock management functions.
Parametrics
XC3S400-4FG456C absolute maxing ratings: (1)VCCINT Internal supply voltage: min=–0.5V, max=1.32 V; (2)VCCAUX Auxiliary supply voltage: min=–0.5V, max=3.00 V; (3)VCCO Output driver supply voltage: min=–0.5, max=3.75 V; (4)VREF(2) Input reference voltage: min=–0.5V, max=VCCO+0.5 V; (5)On the condition of Driver in a high-impedance state, VIN(2) Voltage applied to all User I/O pins and Dual-Purpose pins(3): min=–0.5V, max=VCCO+0.5 V; Voltage applied to all Dedicated pins(4): min=–0.5V, max=VCCAUX+0.5 V; (6)On the condition of VCCO ≤ 3.0V, TJ Junction temperature: max=125℃; on the condition of VCCO > 3.0V: max=105℃; (7)TSOL(5) Soldering temperature: max=220℃; (8)TSTG Storage temperature: min=–65℃, max=150℃.
Features
XC3S400-4FG456C features: (1)Revolutionary 90-nanometer process technology; (2)Very low cost, high-performance logic solution for high-volume, consumer-oriented applications: Densities as high as 74,880 logic cells; 326 MHz system clock rate; Three power rails: for core (1.2V), I/Os (1.2V to 3.3V), and auxiliary purposes (2.5V); (3)SelectIO signaling: Up to 784 I/O pins; 622 Mb/s data transfer rate per I/O; Seventeen single-ended signal standards; Seven differential signal standards including LVDS; Termination by Digitally Controlled Impedance; Signal swing ranging from 1.14V to 3.45V; Double Data Rate (DDR) support.
Diagrams
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![]() XC3S1000-4FG456I |
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