THC63LVDM83R

reduced swing LVDS, 24bit/18bit, TSSOP, 24Bit/18Bit, 298 Megabytes, 20-85MHz, THC63LVDM83R

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Price:: US $0.50~2.00 / piece [Get Latest Price]

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	US $0.50~2.00

PartNumber:: THC63LVDM83R

Brand:: THine Electronics, Inc. - THine | Pack: TSSOP | D/C: 11+

Availability:: Supply Ability: 10000/Week Can Ship Immediately
Delivery: 10-15 Business Days (ships out within 3 Business days)

Quantity:: piece

Total Price:: US $0

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Products Upload time: 2012-05-16

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Part Number:THC63LVDM83R
US $0.50 - 2.00
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US $100.00 - 100.00 / Piece
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US $0.65 - 1.50 / Piece
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Product Summary

The THC63LVDM83R transmitter converts 28bits of CMOS/TTL data into LVDS (Low Voltage Differential Signaling) data stream. A phase-locked transmit clock of the THC63LVDM83R is transmitted in parallel with the data streams over a fifth LVDS link. At a transmit clock frequency of 85MHz, 28bits of RGB data and 4bits of LCD timing and control data are transmitted at a rate of 595Mbps per LVDS channel. Also available is THC63LVDM83R that converts 21bits of CMOS/TTL data into LVDS(Low Voltage Differential Signaling) data stream. The transmitter THC63LVDM83R can be programmed reduced swing LVDS through a dedicated pin for low power consumption and EMI.

Parametrics

THC63LVDM83R absolute maximum ratings: (1)Supply Voltage (VCC): -0.3V ~ +4.0V; (2)CMOS/TTL Input Voltage: -0.3V ~ (VCC + 0.3V); (3)CMOS/TTL Output Voltage: -0.3V ~ (VCC + 0.3V); (4)LVDS Driver Output Voltage: -0.3V ~ (VCC + 0.3V); (5)Output Current: continuous; (6)Junction Temperature: +125℃; (7)Storage Temperature Range: -55 ~ +150℃; (8)Resistance to soldering heat: +260℃ /10sec; (9)Maximum Power Dissipation @+25: 0.5W.

Features

THC63LVDM83R features: (1)28:4 Data channel compression at up to 298 Megabytes per sec throughput; (2)Wide dot clock range: 20-85MHz suited for VGA, SVGA, XGA and SXGA; (3)Narrow bus (10 lines or 8 lines) reduces cable size; (4)Support Reduced swing LVDS for Low EMI; (5)200mV swing LVDS/350mV swing LVDS selectable; (6)Support Spread Spectrum Clock Generator; (7)On chip Input Jitter Filtering; (8)PLL requires No external components; (9)Single 3.3V supply with 125mW(TYP); (10)Power-Down Mode; (11)Low profile 56 or 48 Lead TSSOP Package; (12)Clock Edge Programmable.